diff options
author | Bad Diode <bd@badd10de.dev> | 2023-08-30 15:35:09 +0200 |
---|---|---|
committer | Bad Diode <bd@badd10de.dev> | 2023-08-30 15:35:09 +0200 |
commit | ac0fb608825c032e58bb533e30a77b1911b9bae9 (patch) | |
tree | aeffd99db5e6b90344cbe3c5be293d60e9d64c01 | |
parent | 81462f66b843b138240e7c6252c434d24a085afd (diff) | |
download | uxngba-ac0fb608825c032e58bb533e30a77b1911b9bae9.tar.gz uxngba-ac0fb608825c032e58bb533e30a77b1911b9bae9.zip |
Fix deo ops and add system and screen deo/dei funcs
-rw-r--r-- | src/config.c | 2 | ||||
-rw-r--r-- | src/main.c | 419 | ||||
-rw-r--r-- | src/uxn-core.s | 20 |
3 files changed, 226 insertions, 215 deletions
diff --git a/src/config.c b/src/config.c index 42ad56b..d100233 100644 --- a/src/config.c +++ b/src/config.c | |||
@@ -8,4 +8,4 @@ | |||
8 | #define CONTROL_METHODS CONTROL_CONTROLLER,CONTROL_MOUSE,CONTROL_KEYBOARD | 8 | #define CONTROL_METHODS CONTROL_CONTROLLER,CONTROL_MOUSE,CONTROL_KEYBOARD |
9 | #endif | 9 | #endif |
10 | 10 | ||
11 | #define PROF_ENABLE 2 | 11 | #define PROF_ENABLE 0 |
@@ -72,6 +72,121 @@ deo_console(u8 *dev, u8 port) { | |||
72 | } | 72 | } |
73 | } | 73 | } |
74 | 74 | ||
75 | u16 | ||
76 | dei_screen(u8 *dev, u8 port) { | ||
77 | switch(port) { | ||
78 | case 0x2: return (SCREEN_WIDTH); | ||
79 | case 0x3: return (SCREEN_WIDTH >> 8); | ||
80 | case 0x4: return (SCREEN_HEIGHT); | ||
81 | case 0x5: return (SCREEN_HEIGHT >> 8); | ||
82 | default: return dev[port]; | ||
83 | } | ||
84 | } | ||
85 | |||
86 | void | ||
87 | deo_screen(u8 *dev, u8 port) { | ||
88 | switch(port) { | ||
89 | case 0xe: { | ||
90 | u8 ctrl = dev[0xe]; | ||
91 | u8 color = ctrl & 0x3; | ||
92 | u16 x0 = PEEK2(dev + 0x8); | ||
93 | u16 y0 = PEEK2(dev + 0xa); | ||
94 | u8 *layer = (ctrl & 0x40) ? FG_BACK : BG_BACK; | ||
95 | if(ctrl & 0x80) { | ||
96 | u16 x1 = SCREEN_WIDTH - 1; | ||
97 | u16 y1 = SCREEN_HEIGHT - 1; | ||
98 | if(ctrl & 0x10) x1 = x0, x0 = 0; | ||
99 | if(ctrl & 0x20) y1 = y0, y0 = 0; | ||
100 | PROF(screen_fill(layer, x0, y0, x1, y1, color), ppu_fill_cycles); | ||
101 | } else { | ||
102 | PROF(ppu_pixel(layer, x0, y0, color), ppu_pixel_cycles); | ||
103 | if(dev[0x6] & 0x1) POKE2(dev + 0x8, x0 + 1); /* auto x+1 */ | ||
104 | if(dev[0x6] & 0x2) POKE2(dev + 0xa, y0 + 1); /* auto y+1 */ | ||
105 | } | ||
106 | break; | ||
107 | } | ||
108 | case 0xf: { | ||
109 | u16 x, y, dx, dy, addr; | ||
110 | u8 n, twobpp = !!(dev[0xf] & 0x80); | ||
111 | x = PEEK2(dev + 0x8); | ||
112 | y = PEEK2(dev + 0xa); | ||
113 | addr = PEEK2(dev + 0xc); | ||
114 | n = dev[0x6] >> 4; | ||
115 | dx = (dev[0x6] & 0x01) << 3; | ||
116 | dy = (dev[0x6] & 0x02) << 2; | ||
117 | if(addr > 0x10000 - ((n + 1) << (3 + twobpp))) { | ||
118 | return; | ||
119 | } | ||
120 | u8 *layer = (dev[0xf] & 0x40) ? FG_BACK : BG_BACK; | ||
121 | u8 color = dev[0xf] & 0xf; | ||
122 | u8 flipx = dev[0xf] & 0x10; | ||
123 | u8 flipy = dev[0xf] & 0x20; | ||
124 | for(size_t i = 0; i <= n; i++) { | ||
125 | u8 *sprite = &uxn_ram[addr]; | ||
126 | if (twobpp) { | ||
127 | PROF(ppu_2bpp(layer, | ||
128 | x + dy * i, | ||
129 | y + dx * i, | ||
130 | sprite, | ||
131 | color, | ||
132 | flipx, flipy), ppu_chr_cycles); | ||
133 | } else { | ||
134 | PROF(ppu_1bpp(layer, | ||
135 | x + dy * i, | ||
136 | y + dx * i, | ||
137 | sprite, | ||
138 | color, | ||
139 | flipx, flipy), ppu_icn_cycles); | ||
140 | } | ||
141 | addr += (dev[0x6] & 0x04) << (1 + twobpp); | ||
142 | } | ||
143 | POKE2(dev + 0xc, addr); /* auto addr+length */ | ||
144 | POKE2(dev + 0x8, x + dx); /* auto x+8 */ | ||
145 | POKE2(dev + 0xa, y + dy); /* auto y+8 */ | ||
146 | break; | ||
147 | } | ||
148 | } | ||
149 | } | ||
150 | |||
151 | void | ||
152 | deo_system(u8 *dev, u8 port) { | ||
153 | switch(port) { | ||
154 | case 0x3: { | ||
155 | // TODO: Rom bank switching. | ||
156 | } break; | ||
157 | case 0x4: { | ||
158 | // TODO: Set wst_ptr, but is it the offset instead? | ||
159 | } break; | ||
160 | case 0x5: { | ||
161 | // TODO: Set rst_ptr, but is it the offset instead? | ||
162 | } break; | ||
163 | case 0x8: | ||
164 | case 0x9: | ||
165 | case 0xa: | ||
166 | case 0xb: | ||
167 | case 0xc: | ||
168 | case 0xd: { | ||
169 | // Setup RGB palette. | ||
170 | putcolors(&dev[0x8]); | ||
171 | } break; | ||
172 | case 0xe: { | ||
173 | // TODO: System inspect. | ||
174 | } break; | ||
175 | } | ||
176 | } | ||
177 | |||
178 | u16 | ||
179 | dei_system(u8 *dev, u8 port) { | ||
180 | switch (port) { | ||
181 | case 0x4: { | ||
182 | // TODO: Return wst_ptr, but is it the offset instead? | ||
183 | } break; | ||
184 | case 0x5: { | ||
185 | // TODO: Return rst_ptr, but is it the offset instead? | ||
186 | } break; | ||
187 | default: { return dev[port]; } break; } | ||
188 | } | ||
189 | |||
75 | void | 190 | void |
76 | deo_stub(u8 *dev, u8 port) { | 191 | deo_stub(u8 *dev, u8 port) { |
77 | (void)dev; | 192 | (void)dev; |
@@ -89,137 +204,6 @@ init_uxn() { | |||
89 | // Initialize uxn. | 204 | // Initialize uxn. |
90 | u32 fill = 0; | 205 | u32 fill = 0; |
91 | dma_fill(uxn_ram, fill, sizeof(uxn_ram), 3); | 206 | dma_fill(uxn_ram, fill, sizeof(uxn_ram), 3); |
92 | // uxn_boot(u, uxn_ram, uxn_dei, uxn_deo); | ||
93 | |||
94 | // Copy rom to VM. | ||
95 | // u8 uxn_rom[] = { | ||
96 | // // // ADD test. | ||
97 | // // 0x80, 0x04, 0x80, 0x08, 0x18, // #04 #08 ADD -> 0c | ||
98 | // // 0xa0, 0x00, 0x04, 0xa0, 0x00, 0x08, 0x38, // #0004 #0008 ADD2 -> 000c | ||
99 | // // 0xa0, 0x00, 0xff, 0xa0, 0x00, 0x02, 0x38, // #00ff #0002 ADD2 -> 0101 | ||
100 | // // // SUB test. | ||
101 | // // 0x80, 0x08, 0x80, 0x03, 0x19, // #08 #03 SUB -> 05 | ||
102 | // // 0xa0, 0x00, 0x08, 0xa0, 0x00, 0x03, 0x39, // #0008 #0003 SUB2 -> 0005 | ||
103 | // // 0xa0, 0x01, 0x01, 0xa0, 0x00, 0x02, 0x39, // #0008 #0003 SUB2 -> 00ff | ||
104 | // // // MUL test. | ||
105 | // // 0x80, 0x03, 0x80, 0x04, 0x1a, // #03 #04 MUL -> 0c | ||
106 | // // 0xa0, 0x00, 0x03, 0xa0, 0x00, 0x04, 0x3a, // #0003 #0004 MUL2 -> 000c | ||
107 | // // 0xa0, 0x00, 0xff, 0xa0, 0x00, 0x02, 0x3a, // #00ff #0002 MUL2 -> 01fe | ||
108 | // // // DIV test. | ||
109 | // // 0x80, 0x08, 0x80, 0x04, 0x1b, // #08 #04 DIV -> 02 | ||
110 | // // 0xa0, 0x00, 0x08, 0xa0, 0x00, 0x04, 0x3b, // #0008 #0004 DIV2 -> 0002 | ||
111 | // // // INC test. | ||
112 | // // 0x80, 0x09, 0x01, // #09 INC -> 0a | ||
113 | // // 0xa0, 0x00, 0x09, 0x21, // #0009 INC2 -> 000a | ||
114 | // // 0xa0, 0x00, 0xff, 0x21, // #0009 INC2 -> 0100 | ||
115 | // // 0xa0, 0x00, 0xff, 0x21, 0x21, // #0009 INC2 INC2 -> 0101 | ||
116 | // // // POP. | ||
117 | // // 0xa0, 0x12, 0x34, 0x02, | ||
118 | // // 0xa0, 0x12, 0x34, 0x22, | ||
119 | // // 0xa0, 0x00, 0x00, | ||
120 | // // // NIP. | ||
121 | // // 0xa0, 0x12, 0x34, 0x03, // -> ( 34 ) | ||
122 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0x23, // -> ( 56 78 ) | ||
123 | // // // SWP. | ||
124 | // // 0xa0, 0x12, 0x34, 0x04, // -> ( 34 12 ) | ||
125 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0x24, // -> ( 56 78 12 34 ) | ||
126 | // // // ROT. | ||
127 | // // 0xa0, 0x12, 0x34, 0x80, 0x56, 0x05, // -> ( 34 56 12 ) | ||
128 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0xa0, 0x9a, 0xbc, 0x25, // -> ( 56 78 9a bc 12 34 ) | ||
129 | // // // DUP. | ||
130 | // // 0xa0, 0x12, 0x34, 0x06, // -> ( 12 34 34 ) | ||
131 | // // 0xa0, 0x12, 0x34, 0x26, // -> ( 12 34 12 34 ) | ||
132 | // // // OVR. | ||
133 | // // 0xa0, 0x12, 0x34, 0x07, // -> ( 12 34 12 ) | ||
134 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0x27, // -> ( 12 34 56 78 12 34 ) | ||
135 | // // // EQU. | ||
136 | // // 0xa0, 0x12, 0x12, 0x08, // -> ( 01 ) | ||
137 | // // 0xa0, 0x12, 0x34, 0x08, // -> ( 00 ) | ||
138 | // // 0xa0, 0x12, 0x34, 0xa0, 0x12, 0x34, 0x28, // -> ( 01 ) | ||
139 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0x28, // -> ( 00 ) | ||
140 | // // // NEQ. | ||
141 | // // 0xa0, 0x12, 0x12, 0x09, // -> ( 00 ) | ||
142 | // // 0xa0, 0x12, 0x34, 0x09, // -> ( 01 ) | ||
143 | // // 0xa0, 0x12, 0x34, 0xa0, 0x12, 0x34, 0x29, // -> ( 00 ) | ||
144 | // // 0xa0, 0x12, 0x34, 0xa0, 0x56, 0x78, 0x29, // -> ( 01 ) | ||
145 | // // // GTH. | ||
146 | // // 0xa0, 0x12, 0x34, 0x0a, // -> ( 00 ) | ||
147 | // // 0xa0, 0x34, 0x12, 0x0a, // -> ( 01 ) | ||
148 | // // 0xa0, 0x12, 0x34, 0xa0, 0x34, 0x56, 0x2a, // -> ( 00 ) | ||
149 | // // 0xa0, 0x34, 0x56, 0xa0, 0x12, 0x34, 0x2a, // -> ( 01 ) | ||
150 | // // // LTH. | ||
151 | // // 0xa0, 0x12, 0x34, 0x0b, // -> ( 01 ) | ||
152 | // // 0xa0, 0x34, 0x12, 0x0b, // -> ( 00 ) | ||
153 | // // 0xa0, 0x12, 0x34, 0xa0, 0x34, 0x56, 0x2b, // -> ( 01 ) | ||
154 | // // 0xa0, 0x34, 0x56, 0xa0, 0x12, 0x34, 0x2b, // -> ( 00 ) | ||
155 | // // // AND. | ||
156 | // // 0xa0, 0x0f, 0x88, 0x1c, // -> ( 08 ) | ||
157 | // // 0xa0, 0xf0, 0x88, 0x1c, // -> ( 80 ) | ||
158 | // // 0xa0, 0x00, 0x0f, 0xa0, 0x99, 0x88, 0x3c, // -> ( 00 08 ) | ||
159 | // // // ORA. | ||
160 | // // 0xa0, 0x0f, 0x88, 0x1d, // -> ( 8f ) | ||
161 | // // 0xa0, 0xf0, 0x08, 0x1d, // -> ( f8 ) | ||
162 | // // 0xa0, 0xf0, 0x0f, 0xa0, 0xaa, 0xaa, 0x3d, // -> ( fa af ) | ||
163 | // // // EOR. | ||
164 | // // 0xa0, 0x0f, 0x88, 0x1e, // -> ( 87 ) | ||
165 | // // 0xa0, 0xf0, 0x08, 0x1e, // -> ( f8 ) | ||
166 | // // 0xa0, 0xf0, 0x0f, 0xa0, 0xaa, 0xaa, 0x3e, // -> ( 5a a5 ) | ||
167 | // // // SFT. | ||
168 | // // 0xa0, 0x34, 0x10, 0x1f, // -> ( 68 ) | ||
169 | // // 0xa0, 0x34, 0x01, 0x1f, // -> ( 1a ) | ||
170 | // // 0xa0, 0x34, 0x33, 0x1f, // -> ( 30 ) | ||
171 | // // 0xa0, 0x12, 0x48, 0x80, 0x34, 0x3f, // -> ( 09 20 ) | ||
172 | // // // STZ / LDZ. | ||
173 | // // 0xa0, 0x34, 0x00, 0x11, // STZ (u8*)uxn_ram[1] = 0x34 | ||
174 | // // 0xa0, 0xaa, 0xbb, 0x80, 0x01, 0x31, // STZ2 (u16*)uxn_ram[1] = 0x34 | ||
175 | // // 0x80, 0x00, 0x10, // LDZ -> ( 34 ) | ||
176 | // // 0x80, 0x01, 0x30, // LDZ2 -> ( aa bb ) | ||
177 | // // // LDR / SRT | ||
178 | // // 0xa0, 0xab, 0xcd, 0x80, 0xfb, 0x12, | ||
179 | // // 0xa0, 0xab, 0xcd, 0x80, 0xfb, 0x32, | ||
180 | // // 0x80, 1, 0x12, 0xa0, 0xaa, 0xbb, | ||
181 | // // 0xa0, 0xff, 0xee, 0x80, 0xfa, 0x33, | ||
182 | // // 0x80, 0xff, 0x80, 1, 0x13, 0xa0, 0xaa, 0xbb, | ||
183 | // // 0xa0, 0xff, 0xee, 0x80, 1, 0x33, 0xa0, 0xaa, 0xbb, | ||
184 | // // LDA /STA | ||
185 | // // 0xa0, 0x01, 0x05, 0x14, 0xa0, 0xaa, 0xbb, | ||
186 | // // 0xa0, 0x01, 0x05, 0x34, 0xa0, 0xcc, 0xdd, | ||
187 | // // 0xa0, 0xab, 0xcd, 0xa0, 0x01, 0x08, 0x15, | ||
188 | // // 0xa0, 0xab, 0xcd, 0xa0, 0x01, 0x08, 0x35, | ||
189 | // // JMP | ||
190 | // // 0x80, 0x01, 0x0c, 0x00, 0x80, 0xaa, | ||
191 | // // 0xa0, 0x01, 0x05, 0x2c, 0x00, 0x80, 0xbb, | ||
192 | // // JCN | ||
193 | // // 0xa0, 0xab, 0xcd, 0x80, 0x01, 0x80, 0x01, 0x0d, 0x04, 0x02, | ||
194 | // // 0xa0, 0xab, 0xcd, 0x80, 0x00, 0x80, 0x01, 0x0d, 0x04, 0x02, | ||
195 | // // 0xa0, 0xab, 0xcd, 0x80, 0x01, 0xa0, 0x01, 0x0a, 0x2d, 0x04, 0x02, | ||
196 | // // 0xa0, 0xab, 0xcd, 0x80, 0x00, 0xa0, 0x01, 0x15, 0x2d, 0x04, 0x02, | ||
197 | // // JSR | ||
198 | // // 0x80, 0x03, 0x0e, 0x80, 0x01, 0x00, 0x80, 0x02, 0x6c, | ||
199 | // // 0x80, 0x03, 0x0e, 0x80, 0x01, 0x00, 0x80, 0x02, 0x6c, | ||
200 | // // JMI/JSI/JCI | ||
201 | // // 0x40, 0x00, 0x01, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
202 | // // 0x40, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
203 | // // 0x40, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, 0x40, 0xff, 0xf7, | ||
204 | // // 0x40, 0x00, 0x04, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
205 | // // 0x40, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
206 | // // 0x60, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
207 | // // 0x60, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, 0x6c | ||
208 | // // 0x80, 0x01, 0x20, 0x00, 0x03, 0x80, 0xff, 0x00, 0xa0, 0xaa, 0xbb, 0xa0, 0xcc, 0xdd, | ||
209 | // // DEO/DEO2 | ||
210 | // // 0x80, 0x68, 0x80, 0x18, 0x17, 0x80, 0x65, 0x80, 0x18, 0x17, 0x80, 0x6c, 0x80, 0x18, 0x17, 0x80, | ||
211 | // // 0x6c, 0x80, 0x18, 0x17, 0x80, 0x6f, 0x80, 0x18, 0x17, 0x80, 0x0a, 0x80, 0x18, 0x17, | ||
212 | // // 0xa0, 0x00, 0x68, 0x80, 0x18, 0x37, 0x80, 0x65, 0x80, 0x18, 0x17, 0x80, 0x6c, 0x80, 0x18, 0x17, 0x80, | ||
213 | // // 0x6c, 0x80, 0x18, 0x17, 0x80, 0x6f, 0x80, 0x18, 0x17, 0x80, 0x0a, 0x80, 0x18, 0x17, | ||
214 | // // 0xa0, 0x2c, 0xe9, 0x80, 0x08, 0x37, | ||
215 | // // 0xa0, 0x6b, 0x4f, 0x80, 0x18, 0x17, 0x80, 0x18, 0x17, 0xa0, 0x0a, 0x18, 0x17, | ||
216 | // 0xc0, 0x6b, 0x80, 0x4f, | ||
217 | // 0x0f, | ||
218 | // 0x6f, | ||
219 | // 0x80, 0x18, | ||
220 | // 0x17, 0x80, 0x18, 0x17, 0xa0, 0x0a, 0x18, 0x17, | ||
221 | // // 0x00, 0x00, | ||
222 | // }; | ||
223 | uxn_rom = _binary_build_uxn_rom_start; | 207 | uxn_rom = _binary_build_uxn_rom_start; |
224 | uxn_rom_size = (size_t)_binary_build_uxn_rom_size; | 208 | uxn_rom_size = (size_t)_binary_build_uxn_rom_size; |
225 | memcpy(uxn_ram + PAGE_PROGRAM, uxn_rom, uxn_rom_size); | 209 | memcpy(uxn_ram + PAGE_PROGRAM, uxn_rom, uxn_rom_size); |
@@ -236,12 +220,86 @@ init_uxn() { | |||
236 | deo_map[i] = deo_stub; | 220 | deo_map[i] = deo_stub; |
237 | dei_map[i] = dei_stub; | 221 | dei_map[i] = dei_stub; |
238 | } | 222 | } |
223 | deo_map[0] = deo_system; | ||
224 | dei_map[0] = dei_system; | ||
239 | deo_map[1] = deo_console; | 225 | deo_map[1] = deo_console; |
226 | deo_map[2] = deo_screen; | ||
227 | dei_map[2] = dei_screen; | ||
240 | } | 228 | } |
241 | 229 | ||
242 | // TODO: | 230 | typedef enum DebugFlags { |
243 | // - Make sure we are evaluating everything on the main loop, not just one | 231 | SHOW_ROM = (1 << 0), |
244 | // vector. | 232 | SHOW_WST = (1 << 1), |
233 | SHOW_RST = (1 << 2), | ||
234 | SHOW_ZP = (1 << 3), | ||
235 | SHOW_DEV = (1 << 4), | ||
236 | } DebugFlags; | ||
237 | |||
238 | void | ||
239 | print_debug_info(u8 flags) { | ||
240 | if (flags & SHOW_ROM) { | ||
241 | txt_printf("\nROM"); | ||
242 | for (size_t i = 0; i < 128; i++) { | ||
243 | if (i % 8 == 0) { | ||
244 | txt_printf("\n"); | ||
245 | } | ||
246 | txt_printf("%02x ", uxn_ram[i + PAGE_PROGRAM]); | ||
247 | } | ||
248 | txt_printf("\n"); | ||
249 | } | ||
250 | if (flags & SHOW_DEV) { | ||
251 | txt_printf("\nDEV MEM"); | ||
252 | for (size_t i = 0; i < 128; i++) { | ||
253 | if (i % 8 == 0) { | ||
254 | txt_printf("\n"); | ||
255 | } | ||
256 | if (i % 16 == 0) { | ||
257 | txt_printf("|"); | ||
258 | } else { | ||
259 | txt_printf(" "); | ||
260 | } | ||
261 | txt_printf("%02x", device_data[i]); | ||
262 | } | ||
263 | txt_printf("\n"); | ||
264 | } | ||
265 | if (flags & SHOW_WST) { | ||
266 | txt_printf("\nWST ("); | ||
267 | txt_printf("SIZE: %d)", wst_ptr - (uintptr_t)wst); | ||
268 | for (size_t i = 0; i < 128; i++) { | ||
269 | if (i % 8 == 0) { | ||
270 | txt_printf("\n"); | ||
271 | } | ||
272 | if (i >= (wst_ptr - (uintptr_t)wst)) { | ||
273 | txt_printf("%02x ", 0); | ||
274 | } else { | ||
275 | txt_printf("%02x ", wst[i]); | ||
276 | } | ||
277 | } | ||
278 | } | ||
279 | if (flags & SHOW_RST) { | ||
280 | txt_printf("RST ("); | ||
281 | txt_printf("SIZE: %d)", rst_ptr - (uintptr_t)rst); | ||
282 | for (size_t i = 0; i < 128; i++) { | ||
283 | if (i % 8 == 0) { | ||
284 | txt_printf("\n"); | ||
285 | } | ||
286 | if (i >= (rst_ptr - (uintptr_t)rst)) { | ||
287 | txt_printf("%02x ", 0); | ||
288 | } else { | ||
289 | txt_printf("%02x ", rst[i]); | ||
290 | } | ||
291 | } | ||
292 | } | ||
293 | if (flags & SHOW_ZP) { | ||
294 | txt_printf("RAM (ZP)\n"); | ||
295 | for (size_t i = 0; i < 128; i++) { | ||
296 | if (i % 8 == 0) { | ||
297 | txt_printf("\n"); | ||
298 | } | ||
299 | txt_printf("%02x ", uxn_ram[i]); | ||
300 | } | ||
301 | } | ||
302 | } | ||
245 | 303 | ||
246 | int | 304 | int |
247 | main(void) { | 305 | main(void) { |
@@ -268,88 +326,29 @@ main(void) { | |||
268 | init_uxn(); | 326 | init_uxn(); |
269 | 327 | ||
270 | // Enable sound. | 328 | // Enable sound. |
271 | init_sound(); | 329 | // init_sound(); |
272 | 330 | ||
273 | // Main loop. | 331 | // Main loop. |
274 | // uxn_eval(&u, PAGE_PROGRAM); | ||
275 | u8 frame_counter = 0; | 332 | u8 frame_counter = 0; |
276 | |||
277 | FRAME_START(); | ||
278 | PROF(uxn_eval_asm(PAGE_PROGRAM), eval_cycles); | 333 | PROF(uxn_eval_asm(PAGE_PROGRAM), eval_cycles); |
279 | FRAME_END(); | ||
280 | PROF_SHOW(); | ||
281 | |||
282 | // txt_printf("\nROM"); | ||
283 | // for (size_t i = 0; i < 32; i++) { | ||
284 | // if (i % 8 == 0) { | ||
285 | // txt_printf("\n"); | ||
286 | // } | ||
287 | // txt_printf("%02x ", uxn_ram[i + PAGE_PROGRAM]); | ||
288 | // } | ||
289 | // txt_printf("\n"); | ||
290 | |||
291 | // txt_printf("\nWST ("); | ||
292 | // txt_printf("SIZE: %d)", wst_ptr - (uintptr_t)wst); | ||
293 | // for (size_t i = 0; i < 32; i++) { | ||
294 | // if (i % 8 == 0) { | ||
295 | // txt_printf("\n"); | ||
296 | // } | ||
297 | // if (i >= (wst_ptr - (uintptr_t)wst)) { | ||
298 | // txt_printf("%02x ", 0); | ||
299 | // } else { | ||
300 | // txt_printf("%02x ", wst[i]); | ||
301 | // } | ||
302 | // } | ||
303 | // txt_printf("\n\n"); | ||
304 | // txt_printf("RST ("); | ||
305 | // txt_printf("SIZE: %d)", rst_ptr - (uintptr_t)rst); | ||
306 | // for (size_t i = 0; i < 32; i++) { | ||
307 | // if (i % 8 == 0) { | ||
308 | // txt_printf("\n"); | ||
309 | // } | ||
310 | // if (i >= (rst_ptr - (uintptr_t)rst)) { | ||
311 | // txt_printf("%02x ", 0); | ||
312 | // } else { | ||
313 | // txt_printf("%02x ", rst[i]); | ||
314 | // } | ||
315 | // } | ||
316 | // txt_printf("\n\n"); | ||
317 | // txt_printf("RAM (ZP)\n"); | ||
318 | // for (size_t i = 0; i < 64; i++) { | ||
319 | // if (i % 8 == 0) { | ||
320 | // txt_printf("\n"); | ||
321 | // } | ||
322 | // txt_printf("%02x ", uxn_ram[i]); | ||
323 | // } | ||
324 | |||
325 | uintptr_t stack_size = wst_ptr - (uintptr_t)wst; | ||
326 | while(true) { | 334 | while(true) { |
327 | txt_position(0,0); | 335 | txt_position(0, 0); |
328 | // bios_vblank_wait(); | 336 | // print_debug_info(SHOW_WST); |
329 | // FRAME_START(); | ||
330 | // // PROF(handle_input(&u), input_cycles); | ||
331 | // // PROF(uxn_eval(&u, PEEK2(&u.dev[0x20])), eval_cycles); | ||
332 | // // PROF(sound_mix(), mix_cycles); | ||
333 | // // // TODO: allow configuration to do VSYNC at 15 or 30 fps to avoid too | ||
334 | // // // much memory copying on demanding uxn roms. | ||
335 | // // PROF_SHOW(); | ||
336 | // // PROF(flipbuf(), flip_cycles); | ||
337 | // // frame_counter++; | ||
338 | // // if (frame_counter == 60) { | ||
339 | // // seconds++; | ||
340 | // // frame_counter = 0; | ||
341 | // // } | ||
342 | // FRAME_END(); | ||
343 | bios_vblank_wait(); | 337 | bios_vblank_wait(); |
344 | // FRAME_START(); | 338 | FRAME_START(); |
345 | flipbuf(); | 339 | // PROF(handle_input(&u), input_cycles); |
346 | // screen_fill(0); | 340 | PROF(uxn_eval_asm(PEEK2(&device_data[0x20])), eval_cycles); |
347 | // txt_printf("WST: 0x%08x\n", wst); | 341 | // PROF(sound_mix(), mix_cycles); |
348 | // txt_printf("PTR: 0x%08x\n", wst_ptr); | 342 | // TODO: allow configuration to do VSYNC at 15 or 30 fps to avoid too |
349 | // FRAME_END(); | 343 | // much memory copying on demanding uxn roms. |
350 | // PROF_SHOW(); | 344 | PROF_SHOW(); |
351 | // txt_render(); | 345 | PROF(flipbuf(), flip_cycles); |
352 | // txt_clear(); | 346 | frame_counter++; |
347 | if (frame_counter == 60) { | ||
348 | seconds++; | ||
349 | frame_counter = 0; | ||
350 | } | ||
351 | FRAME_END(); | ||
353 | } | 352 | } |
354 | 353 | ||
355 | return 0; | 354 | return 0; |
diff --git a/src/uxn-core.s b/src/uxn-core.s index 318b258..362f0d4 100644 --- a/src/uxn-core.s +++ b/src/uxn-core.s | |||
@@ -547,8 +547,11 @@ deo2: | |||
547 | ldr r0, =device_data | 547 | ldr r0, =device_data |
548 | lsl r4, #4 | 548 | lsl r4, #4 |
549 | add r0, r4 | 549 | add r0, r4 |
550 | strh r5, [r0, r3] | ||
551 | mov r1, r3 | 550 | mov r1, r3 |
551 | add r3, r0 | ||
552 | strb r5, [r3, #1] | ||
553 | lsr r5, #8 | ||
554 | strb r5, [r3] | ||
552 | mov lr, pc | 555 | mov lr, pc |
553 | bx r6 | 556 | bx r6 |
554 | 557 | ||
@@ -659,8 +662,11 @@ deo2r: | |||
659 | ldr r0, =device_data | 662 | ldr r0, =device_data |
660 | lsl r4, #4 | 663 | lsl r4, #4 |
661 | add r0, r4 | 664 | add r0, r4 |
662 | strh r5, [r0, r3] | ||
663 | mov r1, r3 | 665 | mov r1, r3 |
666 | add r3, r0 | ||
667 | strb r5, [r3, #1] | ||
668 | lsr r5, #8 | ||
669 | strb r5, [r3] | ||
664 | mov lr, pc | 670 | mov lr, pc |
665 | bx r6 | 671 | bx r6 |
666 | 672 | ||
@@ -755,8 +761,11 @@ deo2k: | |||
755 | ldr r0, =device_data | 761 | ldr r0, =device_data |
756 | lsl r4, #4 | 762 | lsl r4, #4 |
757 | add r0, r4 | 763 | add r0, r4 |
758 | strh r5, [r0, r3] | ||
759 | mov r1, r3 | 764 | mov r1, r3 |
765 | add r3, r0 | ||
766 | strb r5, [r3, #1] | ||
767 | lsr r5, #8 | ||
768 | strb r5, [r3] | ||
760 | mov lr, pc | 769 | mov lr, pc |
761 | bx r6 | 770 | bx r6 |
762 | ldmfd sp!, {r0, r7, lr} | 771 | ldmfd sp!, {r0, r7, lr} |
@@ -849,8 +858,11 @@ deo2kr: | |||
849 | ldr r0, =device_data | 858 | ldr r0, =device_data |
850 | lsl r4, #4 | 859 | lsl r4, #4 |
851 | add r0, r4 | 860 | add r0, r4 |
852 | strh r5, [r0, r3] | ||
853 | mov r1, r3 | 861 | mov r1, r3 |
862 | add r3, r0 | ||
863 | strb r5, [r3, #1] | ||
864 | lsr r5, #8 | ||
865 | strb r5, [r3] | ||
854 | mov lr, pc | 866 | mov lr, pc |
855 | bx r6 | 867 | bx r6 |
856 | ldmfd sp!, {r0, r7, lr} | 868 | ldmfd sp!, {r0, r7, lr} |