aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBad Diode <bd@badd10de.dev>2023-08-28 13:13:45 +0200
committerBad Diode <bd@badd10de.dev>2023-08-28 13:13:45 +0200
commit8ea88188b604f42e77ab9e929587f80601e5da85 (patch)
tree152b94f50cd1578dacacb524477eda17bef9186a
parent95ad808ef8ea804ed778719606781ba35bfe7a6f (diff)
downloaduxngba-8ea88188b604f42e77ab9e929587f80601e5da85.tar.gz
uxngba-8ea88188b604f42e77ab9e929587f80601e5da85.zip
Implement INC instructions and fix add/sub/mul behaviour
-rw-r--r--src/main.c13
-rw-r--r--src/uxn-core.s39
2 files changed, 34 insertions, 18 deletions
diff --git a/src/main.c b/src/main.c
index 315292e..f70fbe9 100644
--- a/src/main.c
+++ b/src/main.c
@@ -43,7 +43,7 @@ void
43init_uxn() { 43init_uxn() {
44 // Initialize uxn. 44 // Initialize uxn.
45 u32 fill = 0; 45 u32 fill = 0;
46 dma_fill(uxn_ram, fill, 0x10300, 3); 46 dma_fill(uxn_ram, fill, sizeof(uxn_ram), 3);
47 // uxn_boot(u, uxn_ram, uxn_dei, uxn_deo); 47 // uxn_boot(u, uxn_ram, uxn_dei, uxn_deo);
48 48
49 // Copy rom to VM. 49 // Copy rom to VM.
@@ -52,13 +52,20 @@ init_uxn() {
52 // ADD test. 52 // ADD test.
53 0x80, 0x04, 0x80, 0x08, 0x18, // #04 #08 ADD -> 0c 53 0x80, 0x04, 0x80, 0x08, 0x18, // #04 #08 ADD -> 0c
54 0xa0, 0x00, 0x04, 0xa0, 0x00, 0x08, 0x38, // #0004 #0008 ADD2 -> 000c 54 0xa0, 0x00, 0x04, 0xa0, 0x00, 0x08, 0x38, // #0004 #0008 ADD2 -> 000c
55 0xa0, 0x00, 0xff, 0xa0, 0x00, 0x02, 0x38, // #00ff #0002 ADD2 -> 0101
55 // SUB test. 56 // SUB test.
56 0x80, 0x08, 0x80, 0x03, 0x19, // #08 #03 ADD -> 05 57 0x80, 0x08, 0x80, 0x03, 0x19, // #08 #03 SUB -> 05
57 0xa0, 0x00, 0x08, 0xa0, 0x00, 0x03, 0x39, // #0008 #0003 ADD2 -> 0005 58 0xa0, 0x00, 0x08, 0xa0, 0x00, 0x03, 0x39, // #0008 #0003 SUB2 -> 0005
59 0xa0, 0x01, 0x01, 0xa0, 0x00, 0x02, 0x39, // #0008 #0003 SUB2 -> 00ff
58 // MUL test. 60 // MUL test.
59 0x80, 0x03, 0x80, 0x04, 0x1a, // #03 #04 MUL -> 0c 61 0x80, 0x03, 0x80, 0x04, 0x1a, // #03 #04 MUL -> 0c
60 0xa0, 0x00, 0x03, 0xa0, 0x00, 0x04, 0x3a, // #0003 #0004 MUL2 -> 000c 62 0xa0, 0x00, 0x03, 0xa0, 0x00, 0x04, 0x3a, // #0003 #0004 MUL2 -> 000c
61 0xa0, 0x00, 0xff, 0xa0, 0x00, 0x02, 0x3a, // #00ff #0002 MUL2 -> 01fe 63 0xa0, 0x00, 0xff, 0xa0, 0x00, 0x02, 0x3a, // #00ff #0002 MUL2 -> 01fe
64 // INC test.
65 0x80, 0x09, 0x01, // #09 INC -> 0a
66 0xa0, 0x00, 0x09, 0x21, // #0009 INC2 -> 000a
67 0xa0, 0x00, 0xff, 0x21, // #0009 INC2 -> 0100
68 0xa0, 0x00, 0xff, 0x21, 0x21 // #0009 INC2 INC2 -> 0101
62 }; 69 };
63 memcpy(uxn_ram + PAGE_PROGRAM, uxn_rom, sizeof(uxn_rom)); 70 memcpy(uxn_ram + PAGE_PROGRAM, uxn_rom, sizeof(uxn_rom));
64} 71}
diff --git a/src/uxn-core.s b/src/uxn-core.s
index e35707f..95afc1a 100644
--- a/src/uxn-core.s
+++ b/src/uxn-core.s
@@ -79,9 +79,19 @@ lit2r:
79 b uxn_decode 79 b uxn_decode
80 80
81inc: 81inc:
82 ldrb r3, [r1, #-1]!
83 add r3, #1
84 strb r3, [r1], #1
82 b uxn_decode 85 b uxn_decode
83 86
84inc2: 87inc2:
88 ldrb r3, [r1, #-1]!
89 ldrb r5, [r1, #-1]!
90 orr r3, r3, r5, lsl #8
91 add r3, r3, #1
92 strb r3, [r1, #1]
93 lsr r3, #8
94 strb r3, [r1], #2
85 b uxn_decode 95 b uxn_decode
86 96
87pop: 97pop:
@@ -226,14 +236,14 @@ add:
226add2: 236add2:
227 ldrb r3, [r1, #-1]! 237 ldrb r3, [r1, #-1]!
228 ldrb r5, [r1, #-1]! 238 ldrb r5, [r1, #-1]!
229 orr r3, r5, r3, lsl #8 239 orr r3, r3, r5, lsl #8
230 ldrb r4, [r1, #-1]! 240 ldrb r4, [r1, #-1]!
231 ldrb r5, [r1, #-1]! 241 ldrb r5, [r1, #-1]!
232 orr r4, r5, r4, lsl #8 242 orr r4, r4, r5, lsl #8
233 add r3, r3, r4 243 add r3, r3, r4
234 strb r3, [r1], #1 244 strb r3, [r1, #1]
235 lsr r3, #8 245 lsr r3, #8
236 strb r3, [r1], #1 246 strb r3, [r1], #2
237 b uxn_decode 247 b uxn_decode
238 248
239sub: 249sub:
@@ -246,14 +256,14 @@ sub:
246sub2: 256sub2:
247 ldrb r3, [r1, #-1]! 257 ldrb r3, [r1, #-1]!
248 ldrb r5, [r1, #-1]! 258 ldrb r5, [r1, #-1]!
249 orr r3, r5, r3, lsl #8 259 orr r3, r3, r5, lsl #8
250 ldrb r4, [r1, #-1]! 260 ldrb r4, [r1, #-1]!
251 ldrb r5, [r1, #-1]! 261 ldrb r5, [r1, #-1]!
252 orr r4, r5, r4, lsl #8 262 orr r4, r4, r5, lsl #8
253 sub r3, r4, r3 263 sub r3, r4, r3
254 strb r3, [r1], #1 264 strb r3, [r1, #1]
255 lsr r3, #8 265 lsr r3, #8
256 strb r3, [r1], #1 266 strb r3, [r1], #2
257 b uxn_decode 267 b uxn_decode
258 268
259mul: 269mul:
@@ -266,15 +276,14 @@ mul:
266mul2: 276mul2:
267 ldrb r3, [r1, #-1]! 277 ldrb r3, [r1, #-1]!
268 ldrb r5, [r1, #-1]! 278 ldrb r5, [r1, #-1]!
269 orr r3, r5, r3, lsl #8 279 orr r3, r3, r5, lsl #8
270 ldrb r4, [r1, #-1]! 280 ldrb r4, [r1, #-1]!
271 ldrb r5, [r1, #-1]! 281 ldrb r5, [r1, #-1]!
272 orr r4, r5, r4, lsl #8 282 orr r4, r4, r5, lsl #8
273 mul r5, r3, r4 283 mul r3, r3, r4
274 lsr r3, r5, #24 284 strb r3, [r1, #1]
275 strb r3, [r1], #1 285 lsr r3, #8
276 lsr r5, #16 286 strb r3, [r1], #2
277 strb r5, [r1], #1
278 b uxn_decode 287 b uxn_decode
279 288
280div: 289div: