From 3240295fb846dfb0cf95ceef399b3ef9f085b2bd Mon Sep 17 00:00:00 2001 From: Bad Diode Date: Fri, 10 May 2024 18:10:27 +0200 Subject: Refactor gate send functions --- src/main.c | 2 +- src/sequencer.c | 191 ++++++++++++++++++++------------------------------------ 2 files changed, 67 insertions(+), 126 deletions(-) diff --git a/src/main.c b/src/main.c index 81e47a1..170e0e0 100644 --- a/src/main.c +++ b/src/main.c @@ -255,7 +255,7 @@ main(void) { // Register interrupts. irq_init(); - irs_set(IRQ_VBLANK, irs_stub); + irs_set(IRQ_VBLANK, sound_vsync); // Initialize sequencer. sequencer_init(); diff --git a/src/sequencer.c b/src/sequencer.c index a70ae85..9e39cc7 100644 --- a/src/sequencer.c +++ b/src/sequencer.c @@ -22,19 +22,17 @@ clear_pattern(size_t idx) { redraw_bpm = true; redraw_params = true; } - -void -gate_off(void) { - // SIO_MODE = SIO_MODE_GP - // | SIO_SC_OUT(1) - // | SIO_SD_OUT(0) - // | SIO_SI_OUT(0) - // | SIO_SO_OUT(0) - // | SIO_SI(0) - // | SIO_SC(0) - // | SIO_SD(0) - // | SIO_SO(0); - // TIMER_CTRL_3 = 0; +INLINE void +gate_set(u8 sc, u8 so) { + SIO_MODE = SIO_MODE_GP + | SIO_SC_OUT(1) + | SIO_SO_OUT(1) + | SIO_SD_OUT(0) + | SIO_SI_OUT(0) + | SIO_SC(sc) + | SIO_SO(so) + | SIO_SD(0) + | SIO_SI(0); } int pulses_sent = 0; @@ -44,22 +42,14 @@ void gate_lsdj(void) { gate_status ^= 1; if (pulses_sent >= 7) { - gate_off(); + gate_set(0, 0); return; } if (gate_status == 1) { - gate_off(); + gate_set(0, 0); } else { pulses_sent++; - SIO_MODE = SIO_MODE_GP - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SI_OUT(0) - | SIO_SO_OUT(0) - | SIO_SI(0) - | SIO_SC(1) - | SIO_SD(0) - | SIO_SO(0); + gate_set(1, 0); } int n_ticks = -80 / 8 / 2; // 5ms irs_set(IRQ_TIMER_3, gate_lsdj); @@ -69,52 +59,52 @@ gate_lsdj(void) { // TODO: LSDJ sync pulse? -void -gate_on(void) { - // SYNC24 NOTES - // (from https://e-rm.de/data/E-RM_report_HowToDinSync_10_14_EN.pdf) - // - // "Moreover, a duty cycle of 50% doesn’t seem to be nescessary, all tested - // machines were able to sync properly to clock ticks with a positive width - // of 5 ms to up to 300 BPM" @ 24bpq - // - // int bpm = 100; - // if (settings.global_bpm) { - // bpm = settings.bpm; - // } else { - // bpm patterns[current_pattern].bpm; - // } - // gate_off(); - // pulses_sent = 0; - // gate_status = 0; - // SIO_MODE = SIO_MODE_GP - // | SIO_SC_OUT(1) - // | SIO_SD_OUT(0) - // | SIO_SI_OUT(0) - // | SIO_SO_OUT(0) - // | SIO_SI(0) - // | SIO_SC(1) - // | SIO_SD(0) - // | SIO_SO(0); - // // int n_ticks = -80; // 5ms - // // irs_set(IRQ_TIMER_3, gate_off); - // // TIMER_DATA_3 = n_ticks; - // // TIMER_CTRL_3 = TIMER_CTRL_IRQ | TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; - // int n_ticks = -80 / 8 / 2; // 5ms - // irs_set(IRQ_TIMER_3, gate_lsdj); - // TIMER_DATA_3 = n_ticks; - // TIMER_CTRL_3 = TIMER_CTRL_IRQ | TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; - // int n_ticks = -79; // 5ms - // TIMER_DATA_3 = n_ticks; - // TIMER_CTRL_3 = TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; - // while (1) { - // int cnt = TIMER_DATA_3; - // if (cnt >= 80) { - // gate_off(); - // break; - // } - // } -} +//void +//gate_on(void) { +// // SYNC24 NOTES +// // (from https://e-rm.de/data/E-RM_report_HowToDinSync_10_14_EN.pdf) +// // +// // "Moreover, a duty cycle of 50% doesn’t seem to be nescessary, all tested +// // machines were able to sync properly to clock ticks with a positive width +// // of 5 ms to up to 300 BPM" @ 24bpq +// // +// // int bpm = 100; +// // if (settings.global_bpm) { +// // bpm = settings.bpm; +// // } else { +// // bpm patterns[current_pattern].bpm; +// // } +// // gate_off(); +// // pulses_sent = 0; +// // gate_status = 0; +// // SIO_MODE = SIO_MODE_GP +// // | SIO_SC_OUT(1) +// // | SIO_SO_OUT(0) +// // | SIO_SD_OUT(0) +// // | SIO_SI_OUT(0) +// // | SIO_SC(1) +// // | SIO_SO(0) +// // | SIO_SD(0) +// // | SIO_SI(0); +// // // int n_ticks = -80; // 5ms +// // // irs_set(IRQ_TIMER_3, gate_off); +// // // TIMER_DATA_3 = n_ticks; +// // // TIMER_CTRL_3 = TIMER_CTRL_IRQ | TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; +// // int n_ticks = -80 / 8 / 2; // 5ms +// // irs_set(IRQ_TIMER_3, gate_lsdj); +// // TIMER_DATA_3 = n_ticks; +// // TIMER_CTRL_3 = TIMER_CTRL_IRQ | TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; +// // int n_ticks = -79; // 5ms +// // TIMER_DATA_3 = n_ticks; +// // TIMER_CTRL_3 = TIMER_CTRL_ENABLE | TIMER_CTRL_FREQ_3; +// // while (1) { +// // int cnt = TIMER_DATA_3; +// // if (cnt >= 80) { +// // gate_off(); +// // break; +// // } +// // } +//} bool first_pulse = true; int so_status = 1; @@ -124,38 +114,14 @@ lsdj_toggle(void) { gate_status ^= 1; if (pulses_sent >= 7) { TIMER_CTRL_3 = 0; - SIO_MODE = SIO_MODE_GP - | SIO_SI_OUT(0) - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(1) - | SIO_SD(0) - | SIO_SO(so_status); + gate_set(1, so_status); return; } if (gate_status == 1) { - SIO_MODE = SIO_MODE_GP - | SIO_SI_OUT(0) - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(1) - | SIO_SD(0) - | SIO_SO(so_status); + gate_set(1, so_status); } else { pulses_sent++; - SIO_MODE = SIO_MODE_GP - | SIO_SI_OUT(0) - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(0) - | SIO_SD(0) - | SIO_SO(so_status); + gate_set(0, so_status); } TIMER_CTRL_3 = 0; // int n_ticks = -80 / 8 / 2; // 5ms @@ -191,15 +157,7 @@ lsdj_pulse(void) { TIMER_DATA_3 = 0; pulses_sent = 0; gate_status = 0; - SIO_MODE = SIO_MODE_GP - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SI_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(0) - | SIO_SD(0) - | SIO_SO(so_status); + gate_set(0, so_status); int n_ticks = -9; // 122/2 = 61us; 61 / 3.8 = 16 irs_set(IRQ_TIMER_3, lsdj_toggle); TIMER_DATA_3 = n_ticks; @@ -837,15 +795,7 @@ stop_sound(void) { SOUND_NOISE_CTRL = 0; redraw_play_pause = true; redraw_pattern_buttons = true; - SIO_MODE = SIO_MODE_GP - | SIO_SI_OUT(0) - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(1) - | SIO_SD(0) - | SIO_SO(1); + gate_set(1, 1); } void @@ -2154,14 +2104,5 @@ sequencer_init(void) { SOUND_STATUS = SOUND_ENABLE; init_dsound(); set_audio_settings(); - // gate_off(); - SIO_MODE = SIO_MODE_GP - | SIO_SC_OUT(1) - | SIO_SD_OUT(0) - | SIO_SI_OUT(0) - | SIO_SO_OUT(1) - | SIO_SI(0) - | SIO_SC(1) - | SIO_SD(0) - | SIO_SO(1); + gate_set(1, 1); } -- cgit v1.2.1